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| iC-OC INTEGRATING LIGHT-VOLTAGE CONVERTER Rev D1, Page 1/9 FEATURES o o o o o o o o Two photosensors with integrating amplifiers Integration time can be set externally Internal shift register for chain connection Detection of low supply voltage TTL/CMOS-compatible logic inputs and outputs 5 V supply voltage Low power consumption Photosensors with 1 mm pitch; active area ca. 0.97 mm x 0.47 mm (0.44 mm) APPLICATIONS o Optical line sensors o CCD substitute CHIP D1 D2 1.7 mm x 1.2 mm BLOCK DIAGRAM VDD - 1.2V SC1 iC-OC SOUT1 VDD +5V R1 1k D1 INTEGRATOR 1 SOUT2 VDD - 1.2V SC2 ANALOGUE OUTPUT AOUT VOUT D2 INTEGRATOR 2 D Q4 DOUT DIN D Q1 C D Q2 C R D Q3 C R C R BUFFER CLK R LOW VOLTAGE INPUT SHIFT REGISTER GND Copyright (c) 2010 iC-Haus http://www.ichaus.com iC-OC INTEGRATING LIGHT-VOLTAGE CONVERTER Rev D1, Page 2/9 DESCRIPTION iC-OC is an optical sensor with two photodiodes, two integrating amplifiers and a control logic which enables several iC-OCs to be connected in a chain. Furthermore, the control logic, consisting of a twostage shift register, determines when the integration time starts and ends and switches the integrators in sequence to the analogue output. The analogue output is a source follower and in its deactivated state has a high impedance and can thus be used in buses. The control logic output supplies a CMOS compatible signal and in chain connection it can be directly linked to the digital input of the next device. Logic inputs are configured as Schmitt triggers and are TTL/CMOScompatible. All the registers in the device are reset with low voltage (power-down reset). All pins are protected against ESD. CHIP LAYOUT PIN CONFIGURATION Chip PIN FUNCTIONS No. Name Function VDD GND AOUT D1 D2 DIN CLK DOUT VDD AOUT GND Input Clock Input Data Output +5 V Supply Voltage Analogue Output Ground DIN CLK DOUT iC-OC INTEGRATING LIGHT-VOLTAGE CONVERTER Rev D1, Page 3/9 ABSOLUTE MAXIMUM RATINGS Beyond these values damage may occur; device operation is not guaranteed. Item No. Symbol Parameter Supply Voltage Clamping Current in DIN, CLK, DOUT, AOUT Current in DOUT Pulse Current in all Pins (Latch-up strength) ESD Susceptibility, at all Pins Junction Temperature Storage Temperature See package specification Pulse width 10 s HBM, 100 pF discharged through 1.5 k -40 Conditions Min. -0.3 -20 -10 -100 Max. 6.5 20 10 100 2 150 V mA mA mA kV C Unit G001 VDD G002 Ic() G003 I() G004 Ilu() G005 Vd() G006 Tj G007 Ts THERMAL DATA Operating Conditions: VDD = 5 V 10 % Item No. T01 Symbol Ta Parameter Conditions Min. Operating Ambient Temperature Range See package specification Typ. Max. Unit All voltages are referenced to ground unless otherwise stated. All currents flowing into the device pins are positive; all currents flowing out of the device pins are negative. iC-OC INTEGRATING LIGHT-VOLTAGE CONVERTER Rev D1, Page 4/9 ELECTRICAL CHARACTERISTICS Operating Conditions: VDD = 5 V 10 %, RL(VDD/AOUT) = 1 k, Tj = 0...85 C unless otherwise noted Item No. 001 002 003 004 005 006 201 202 203 Symbol Parameter Conditions Min. VDD I(VDD) Vc()hi Vc()lo Aph() ar V0() Vd() Vs() Permissible Supply Voltage Range Supply Current in VDD Clamp Voltage hi at DIN, CLK, DOUT, AOUT Clamp Voltage lo at DIN, CLK, DOUT, AOUT Radiant Sensitive Area Spectral Application Range S(ar) = 0.25 x S()max Vc()hi = V() - VDD, I() = 10 mA, other pins open I() = -10 mA, other pins open 4.5 100 0.3 -1.5 Typ. Max. 5.5 700 1.5 -0.3 V A V V mm nm V mV Unit Total Device ca. 0.97 x 0.47 300 0.7 -10 950 1.4 10 Analogue Output AOUT Output Voltage at no illuminance V0() = VDD - V(AOUT)max, AOUT active (* see below) Variation of Output Voltage at no Vd() = V(AOUT)t1 - V(AOUT)t2, illuminance t = t2 - t1 = 1 ms Saturation Voltage Tenfold illuminance VDD = 4.5 V VDD = 5 V VDD = 5.5 V 1.4 1.45 1.5 15 1.7 0.22 0.13 -5 0.27 0.16 0.32 0.19 5 2 V V V mV V V/pWS V/pWS % A 204 205 206 V() Vlin() K Repeatability (standard deviation 20 measurements at constant LED illuminance, at repeated measurement) Vav(AOUT) 2.91 V, t = 25 s Output Voltage Linearity Range Transfer Factor output voltage vs. light power Transfer Factor Deviation within linearity range Leakage Current V(AOUT) = 0...VDD, AOUT high impedance (* see below) Vlin() = VDD - V0() - V(AOUT) BMST assembly incl. sealing; LED = 628 nm, = 23 nm LED = 880 nm, = 40 nm 207 208 klin I() -2 Shift-Register DIN, CLK, DOUT 301 302 303 304 305 306 307 308 309 310 311 312 313 401 402 403 (*) Vt()hi Vt()lo Vt()hys Ii() f() tw()hi tw()lo tplh tphl tpon tpoff Vs()hi Vs()lo VDDon VDDoff VDDhys Threshold Voltage hi at DIN, CLK Threshold Voltage lo at DIN, CLK Hysteresis at DIN, CLK Input Current in DIN, CLK Permissible Frequency at CLK Permis. Pulse Width hi at CLK Permis. Pulse Width lo at CLK Propagation Delay: CLK hi lo until DOUT lo hi Propagation Delay: CLK hi lo until DOUT hi lo Propagation Delay: CLK lo hi until AOUT active Propagation Delay: CLK lo hi until AOUT high impedance Saturation Voltage hi at DOUT Saturation Voltage lo at DOUT Turn-on Threshold VDD Undervoltage Threshold VDD Hysteresis CL(DOUT) = 50 pF (see Fig. 2) CL(DOUT) = 50 pF (see Fig. 2) CL(VDD/AOUT) = 1 nF (see Fig. 2) CL(VDD/AOUT) = 1 nF (see Fig. 2) Vs()hi = VDD - V(), I() = -1 mA I() = 1 mA Increasing voltage at VDD Decreasing voltage at VDD VDDhys = VDDon - VDDoff 2.1 1.0 0.5 20 20 Vt()hys = Vt()hi - Vt()lo V() = 0...VDD 0.8 250 -1 2.2 1300 1 10 V V mV A MHz ns ns 40 40 800 100 0.4 0.4 3.8 2.1 2 ns ns ns ns V V V V V Low Voltage Detection AOUT active: SOUT1 or SOUT2 closed; AOUT high impedance: SOUT1 and SOUT2 open. iC-OC INTEGRATING LIGHT-VOLTAGE CONVERTER Rev D1, Page 5/9 ELECTRICAL CHARACTERISTICS: Diagrams 100 % 90 80 70 60 50 40 30 20 10 400 600 800 1000 nm 100 % 90 80 70 60 50 40 30 20 10 400 600 800 1000 nm Figure 1: Relative Spectral Sensitivity Figure 2: Relative Spectral Sensitivity with BMST assembly OPERATING REQUIREMENTS: Logic Operating Conditions: VDD = 5 V 10 %, Ta = 0...85 C, input levels lo = 0...0.45 V, hi = 2.4 V...VDD, see Fig. 3 for reference levels Item No. Symbol Parameter Setup time: DIN stable before CLK lo hi Hold time: DIN stable after CLK lo hi Conditions Fig. Min. 3 3 10 5 Max. ns ns Unit I001 tset I002 thold V 2.4V 2.0V Input/Output 0.8V 0.45V t 1 0 Figure 3: Reference levels iC-OC INTEGRATING LIGHT-VOLTAGE CONVERTER Rev D1, Page 6/9 clock cycle 1 CLK DIN1 DOUT1= DIN2 DOUT2 Reset Reset Reset 1 2 3 clock cycle 4 4 5 6 7 8 9 10 Integrator1 Integrator2 Reset Reset Reset Integrator3 Reset Reset Integrator4 5V V(AOUT) Int1 Int2 Int3 Int4 Int1 Int2 Int3 Int4 V0()1 integration time not determined V0()2 V0()3 V0()4 Reset Int1 Int2 Figure 4: Timing characteristics after power on (assumption: V0()1 = V0()2 = V0(), VDD = 5 V) iC-OC INTEGRATING LIGHT-VOLTAGE CONVERTER Rev D1, Page 7/9 DESCRIPTION OF FUNCTIONS iC-OC is an integrating light-voltage converter with two separate photodiodes and two integrators. The integration time starts when the supply voltage is applied. To obtain a specified integration time a hi pulse must first be available at the digital input DIN and clocked by the device. This process sequentially resets the integrators to their initial value and restarts the integration time with the next clock pulse. Flip-flops Q1 to Q3 sequentially accept the signal at DIN with the positive CLK edge. Flip-flop Q4, which controls the DOUT output signal, reacts to the negative CLK edge. The switching states in the IC always remain for the duration of a clock cycle. The process depicted in Fig. 2 is initiated when a hi pulse is applied to DIN. During the first clock cycle integrator 1 is switched to the analogue output AOUT (switch SOUT1 closes). AOUT initially supplies a voltage value which cannot be reproduced as the integration time is unknown. The second clock cycle switches the analogue output from integrator 1 to integrator 2 (SOUT1 opens, SOUT2 closes). A non-reproducible voltage value is again present at AOUT (see above). At the same time the integration capacity of integrator 1 is short-circuited by switch SC1 (reset). Flip-flop Q4 is set in the second clock cycle with the negative clock edge (DOUT1) and thus the DIN signal for the next device in the chain is produced. During the third clock cycle integrator 2 is disconnected from AOUT (SOUT2 opens) and reset (SC2 closes). Simultaneously, the integration time for integrator 1 starts anew (SC1 opens). If several iC-OCs are connected in a chain, then the hi signal from DOUT is shifted into the first flip-flop of the next device with the third clock cycle. During the fourth clock cycle switch SC2 opens and starts the integration time for integrator 2. APPLICATIONS INFORMATION Only when the DOUT2 output has a hi level can the next hi signal be applied to DIN1. The first hi signal clocked by the device implements a sequential reset of the integrators, followed by the integration time starting in sequence. The second hi signal shifted through the register determines the end of the integration time and restarts the integration time after a reset. The integrators can be read out with the aid of a sample and hold circuit, as the device itself has no hold mode. Besides the clock a periodic signal at DIN is also necessary for the continuous operation of the device. With operation of the device at low level illumination the output voltage V(AOUT) decreases by V0(AOUT). When calibrating, this drop in voltage must be determined for each of the photosensors. VDD AOUT GND AOUT VDD GND AOUT VDD iC-OC DIN CLK DOUT iC-OC DIN CLK DOUT DIN1 CLK DOUT1= DIN2 DOUT2 Figure 5: Example of a chain connection for two devices iC-OC INTEGRATING LIGHT-VOLTAGE CONVERTER Rev D1, Page 8/9 Taktzyklus 1 CLK DIN1 DOUT1= DIN2 DOUT2 Reset Reset Reset 1 2 3 Taktzyklus 4 4 5 6 7 8 9 10 Integrator1 Integrator2 Reset Reset Reset Integrator3 Reset Reset Integrator4 5V V(AOUT) Int1 Int2 Int3 Int4 Int1 Int2 Int3 Int4 V0()1 Bereich unbestimmter Integrationszeit V0()2 V0()3 V0()4 Reset Int1 Int2 Figure 6: Time sequence for the chain connection in Fig. 5 after the device has been switched on iC-Haus expressly reserves the right to change its products and/or specifications. An Infoletter gives details as to any amendments and additions made to the relevant current specifications on our internet website www.ichaus.de/infoletter; this letter is generated automatically and shall be sent to registered users by email. Copying - even as an excerpt - is only permitted with iC-Haus approval in writing and precise reference to source. iC-Haus does not warrant the accuracy, completeness or timeliness of the specification on this site and does not assume liability for any errors or omissions in the materials. The data specified is intended solely for the purpose of product description. No representations or warranties, either express or implied, of merchantability, fitness for a particular purpose or of any other nature are made hereunder with respect to information/specification or the products to which information refers and no guarantee with respect to compliance to the intended use is given. In particular, this also applies to the stated possible applications or areas of applications of the product. iC-Haus conveys no patent, copyright, mask work right or other trade mark right to this product. iC-Haus assumes no liability for any patent and/or other trade mark rights of a third party resulting from processing or handling of the product and/or any other use of the product. As a general rule our developments, IPs, principle circuitry and range of Integrated Circuits are suitable and specifically designed for appropriate use in technical applications, such as in devices, systems and any kind of technical equipment, in so far as they do not infringe existing patent rights. In principle the range of use is limitless in a technical sense and refers to the products listed in the inventory of goods compiled for the 2008 and following export trade statistics issued annually by the Bureau of Statistics in Wiesbaden, for example, or to any product in the product catalogue published for the 2007 and following exhibitions in Hanover (Hannover-Messe). We understand suitable application of our published designs to be state-of-the-art technology which can no longer be classed as inventive under the stipulations of patent law. Our explicit application notes are to be treated only as mere examples of the many possible and extremely advantageous uses our products can be put to. iC-OC INTEGRATING LIGHT-VOLTAGE CONVERTER Rev D1, Page 9/9 ORDERING INFORMATION Type iC-OC samples iC-OC Package CDIP16 - Order Designation iC-OC CDIP16 iC-OC chip For technical support, information about prices and terms of delivery please contact: iC-Haus GmbH Am Kuemmerling 18 D-55294 Bodenheim GERMANY Tel.: +49 (61 35) 92 92-0 Fax: +49 (61 35) 92 92-192 Web: http://www.ichaus.com E-Mail: sales@ichaus.com Appointed local distributors: http://www.ichaus.com/sales_partners |
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